1. Field of the Invention
The present invention relates, in general, to hard disk drives and magneto resistive data storage devices and systems, and, more particularly, to a write driver, and associated method, utilizing a write driver circuit to switch a current into a low impedance head connected through a transmission line to the write driver. The write driver circuit is configured to provide highly optimized power consumption and improved impedance matching.
2. Relevant Background
The demand for improved data storage techniques and systems continues to rapidly grow. Hard disk drives utilizing magneto resistive (MR) heads to read and write data onto one or more spinning magnetic platters or disks are one of the more important and wide spread devices in the data storage industry. Hard disk drives may be used in many applications, including enterprise computer systems, personal computers, set top boxes, audio, video, or television applications, and many other large and small computer devices. Many applications are still being developed, and the uses for hard disk drives are expected to increase.
Hard disk drives store binary encoded information as regions of magnetic flux on a media having a magnetic surface coating. It is desirable that these magnetic regions be encoded on the disk as densely as practical, so that a maximum amount of information may be stored. Disk and tape drive suppliers continue to increase areal densities, or the number of data bits per square inch, to meet the increasing demand for storage at competitive pricing. However, increasing areal density requires the write mechanism to produce smaller recorded patterns on the disk. Write head design and write driver design are key technologies needed to achieve these capacity increases.
The magnetic regions are created by passing current through a coil of a magnetic write head. Binary data can be encoded by switching the polarity of the current through a coil in the write head. The current in the write head coil is provided by a circuit in a write driver that is connected to the coil through a flexible transmission interconnect. The data rate (i.e., the rate at which bits can be written onto the media) is determined largely by the rate at which the current can be switched in the write head driver circuit. It is desirable to have a write driver circuit that quickly switches current to the desired polarity and magnitude to support high disk rotation speeds with small magnetic regions. Also, the driver circuit must raise the current amplitude to a level sufficient to ensure the flux generated by the write coil is adequate to saturate the magnetic media while limiting the current below levels that will result in “blooming” of the written magnetic region into adjacent regions of the media.
A conventional write driver circuit comprises an H-bridge configuration using four switches. In an H-bridge circuit, one leg of the bridge is always trying to drive current into the inductive load. In other words, the H-bridge is always coupling the power supply voltage onto one of the inductor nodes and ground to the other inductor node by appropriately activating the bridge switches. While there have been many improvements to conventional write driver circuits to enhance their performance, there are demands for improved performance. For example, many switching write driver circuits still are unable to achieve impedance matching to transmission interconnects and the lack of impedance matching results in pattern dependent distortion which limits the performance of the write circuitry. There are also continuing issues with the power required to operate or drive the write head with the write driver, with an increasing demand to provide higher current to the write head coil with less power.
FIGS. 1 and 2 illustrate two different techniques for driving current into a low impedance write head. The write circuitry 110, 210 are used to drive current or a current step, ΔIOUT, into write heads 116, 230, which are shown for simplicity as a short circuit. Each circuit 110, 210 includes a write driver 112, 212 for driving the head 116, 230 that is connected to the head 116, 230 through a transmission interconnect or electrical connection 114, 220 that is characterized by an odd characteristic impedance, ZODD, and a transmission delay, TD, between the write driver 112, 212 and the head 116, 230. FIGS. 1 and 2 are drawn to show the write drive impedance conditions before the reflected signal that is generated on in the write head 116, 230 appears at the write driver 112, 212 side of the circuit 110, 210, which is typically twice the transmission delay or 2TD. The simplified circuits 110, 210 of FIGS. 1 and 2 allow the output current, ΔIOUT, the write driver output voltage, ΔVIN, and the power supplied by the write driver 112, 212 for the first 2TD seconds after the transition to be calculated using well known equations governing the propagation of signals through a transmission line, e.g., the power consumption equation provided in the following paragraph. Also, the circuits 110, 210 include write driver generators that can be sized in order to have the same output current step, ΔIOUT, to facilitate comparison of the circuits 110, 210.
In circuit 110, the output impedance of the write driver 112 is much higher, e.g., considered to be infinite for simplicity, than the impedance, ZODD, of the interconnect 114 during the transition. The circuit 110 provides a technique for driving current with current source 113 through write head 116 that has the advantage of generating a current amplification effect on the load or head side because the output current step, ΔIOUT, is twice the source current step, ΔIIN/2. The amplification effect accounts for a gain in power of 2 or of 200 percent by the source for the first 2TD seconds with respect to the circuit 210 of FIG. 2, with power consumption determined by the following:Power Consumption=DVIN·DIIN=DIIN2·ZODD=(DIOUT·ZODD)/4
However, the circuit 110 does not address all of the concerns with write driver circuitry. The circuit 110 is problematic because the circuit 110 is not matched in the sense that the write driver 112 has output impedance that is much higher than the characteristic impedance of the transmission line 114. Due to this unmatched condition at the source side of the circuit 110, reflections that are generated by the write head 116 consequent to a transition are not terminated at the source side. Instead, the reflections continue to propagate even after twice the transmission delay, 2TD, which causes the undesirable result of an oscillating output response to the input step.
In circuit 210, the output impedance of the write driver 212 is set equal to the impedance of the transmission interconnect, ZODD, during the transition. The circuit 210 provides an advantage over the circuit 110 of FIG. 1 in that write driver 212 is impedance matched to the interconnect 220 via resistor 214. In this way, propagation of reflected waves is avoided when the current source 216 is used to drive the write head 230. The circuit 210 provides a clean output step, ΔIOUT, in response to the input step, ΔIIN, from current source 216. However, the circuit 210 does not provide any current amplification effect as is provided in the circuit 110 of FIG. 1, as the output current step, ΔIOUT, is equal to the source current step, ΔIIN. As a result, during the period of twice the transmission delay, 2TD, after a transition, half of the current generated by the input source 216 flows away through the parallel path formed by the output impedance 214 of the write driver 212 and only half of the current is effectively launched into the line or interconnect 220, with power consumption determined by the following:Power Consumption=DVIN·DIIN=(DIIN2·ZODD)/2=(DIOUT2·ZODD)/2
Hence, a need exists for a circuit for driving write heads in a hard disk drive (HDD) system that addresses the need for, and benefits associated with, matching the impedance of the write driver circuit with the impedance of interconnects with the write head and also with providing a desirable current amplification effect with a write driver circuit so as to improve or even optimize power supply by the write driver.